Mature Products

Aspen™ III

Based on proprietary ICP source design with grounded Faraday shield, Aspen III delivers production proven and cost-effective strip and etch solutions to semiconductor manufacturers worldwide. The Aspen III’s exceptional platform design can handle both 200 mm and 300 mm wafers, and supports special wafer handling including warped and translucent wafers. The unique process chamber architecture can accommodate technical requirements across multiple technology nodes for the most demanding device manufacturers in the industry.

Product Features:

  • Platform
    • 200 mm / 300 mm bridge tool
    • Glass / quartz / translucent wafer handling
    • Warped (> 5 mm) wafer handling
    • Dual wafer chamber design with independent wafer control
    • Single or dual process chamber options
    • High speed robot
    • Vacuum loadlock
    • More than 500 systems installed worldwide
  • ICPHT / Strip Process Chamber
    • Proprietary Faraday shield ICP source
    • Reducing and fluorine chemistry capability
    • Low cost of consumables
  • LiteEtch Process Chamber
    • Isotropic etch with high concentration fluorine process
    • Fluorine resistance chamber design
  •  eHighlands Etch and Strip Process Chamber
    • Bias capability
    • Low temperature (10°C to 80°C) capability
    • Low pressure (5 mT to 300 mT) capability

Process:

  • Bulk photoresist strip
  • Post ion implant photoresist removal
  • Surface treatment
  • Surface residue removal
  • Polyimide rework / treatment
  • Photolithography rework
  • Surface passivation
  • SiN / SiC barrier etch
  • Resist / BARC etch back

Applications:

  • Memory device fabrication
  • Logic device fabrication
  • LED fabrication
  • CMOS sensor fabrication
  • Power IC fabrication
  • MEMS fabrication
  • Sensor fabrication
  • Wafer level packaging
  • Optoelectronics fabrication
  • Analog / mixed signal device fabrication

Aspen™ II

First introduced in 1990, the Aspen II is based on a highly reliable and productive system design. It provides proven process capabilities and cost of ownership benefits in high volume manufacturing to chipmakers worldwide.

Product Features:

  • Aspen II ICP
    • Proprietary ICP source design with grounded Faraday shield
      • Low ion energy
      • Low cost of consumable
    • Superior process flexibility
      • Reducing chemistry
      • Fluorine chemistry
      • Wide temperature range (100°C to 250°C)
    • Novel system architecture
      • Dual wafer chamber design with individual wafer control
      • Vacuum loadlock
      • High speed robot
      • Small footprint
      • Single or dual process chamber option
      • Wafer size: 100 mm, 150 mm, 200 mm
  • Aspen II Silicon Soft Etch (SSE)
    • Isotropic etch with high percentage fluorine chemistry

Highlights:

  • Production Proven Low Cost of Ownership Solution
    • More than 1,000 systems installed across a wide range of device manufacturers
  • Commitment to Product Improvement
    • Continuous product improvement to satisfy advanced process and factory automation requirements
  • Customer Support 
    • Global customer support infrastructure
    • End-of-life / obsolescence supply chain management
    • Cost effective refurbishment and re-manufacturing services

Process:

  • Bulk photoresist strip
  • Post ion implant photoresist removal
  • Surface treatment
  • Surface residue removal
    • STI etch residue clean
    • Poly gate residue clean
    • Contact / via residue clean
    • Metal residue clean
  • Polyimide rework / treatment
  • Photolithography rework
  • Surface passivation

Application:

  • Memory device fabrication
  • Logic device fabrication
  • LED fabrication
  • CMOS sensor fabrication
  • Power IC fabrication
  • MEMS fabrication
  • Sensor fabrication
  • Wafer level packaging
  • Optoelectronics fabrication
  • Analog / mixed signal device fabrication

Alpine®

Alpine is a cost effective, technology platform for both advanced plasma strip and semi-critical etch applications. Based on proprietary Faraday shield inductively coupled plasma (ICP) source design, Alpine incorporates an electrostatic chuck with bias capability to provide independent control of ion energy and ion density. Developed on a production proven platform, Alpine delivers superior productivity and cost of ownership.

Product Features:

  • Dual wafer process chamber design with individual wafer control
  • ICP plasma source with grounded Faraday shield
  • Standard pedestal or electrostatic chuck
    • Bias capability
  • Full spectrum endpoint sensor option
  • Process flexibility
    • Oxidizing process
    • Reducing process
    • Fluorinated chemistries
  • Independent vacuum loadlock
  • High speed wafer transfer

Highlights:

  • ICP Technology
    • Approximately 10,000 ICP sources operating worldwide
  • Process Capability
    • Advanced strip for FEOL applications
    • Film removal and surface treatment for BEOL applications
    • Low temperature solutions for Wafer Level Packaging and CMOS Image Sensor fabrication
  • Production Capability
    • Dual wafer chamber / multi-chamber system architecture provides high throughput, small footprint, and low operating cost

Applications:

  • FEOL / BEOL
    • Low Temp HDIS
    • Photoresist or BARC etch back
    • Resist strip on Low-k / ULK
    • Multiple-film stack removal
    • Tri-layer rework
    • SiN or SiC barrier removal
    • Descum
    • Post etch clean / surface treatment
    • Metal surface treatment
  • Wafer Level Packaging
    • Dry film resist etch
    • Photoresist/DFR/BCB descum
    • 3D IC photoresist ash / descum
    • Cu surface passivation
    • Photoresist /BCB etch back
    • Polymide etch
    • Pad and line surface clean
    • Residue removal prior to film adhesion